Semiconductor devices such as microprocessors can be made up of millions of transistors, each interconnected by thin metallic lines branching on several levels and electrically isolated from each other by layers of insulating materials. When a new semiconductor design is first produced in a semiconductor fabrication facility, the design typically does not operate exactly as expected. It is then necessary for the engineers who designed the device to review their design and “rewire” it to achieve the desired functionality. Due to the complexity of building a semiconductor device in a semiconductor fabrication facility, it typically takes weeks or months to have the re-designed device produced. Further, the changes implemented frequently do not solve the problem, or the changes expose another flaw in the design. The process of testing, re-designing and re-fabrication can significantly lengthen the time to market new semiconductor devices. Circuit editing—the process of modifying a circuit during its development without having to remanufacture the whole circuit—provides tremendous economic benefits by reducing both processing costs and development cycle times.
Focused ion beams (FIBs) are often used to edit integrated circuits. FIBs can be focused to a spot smaller than one tenth of a micron. Because of their small beam spot size, focused ion beam systems are used to create and alter microscopic structures. Focused ion beams can micro-machine material by sputtering or etching, that is, physically knocking atoms or molecules from the target surface. Focused ion beams can also be used to deposit material, using a precursor gas that adheres to the specimen surface and decomposes in the presence of the ion beam to leave a deposit on the surface. FIB systems are widely used in circuit editing to deposit new metallic paths to create new connections and to remove metallic paths to eliminate existing connections. Using a FIB system to alter a circuit allows a circuit designer to test variations of the circuit without undertaking the lengthy process of modifying the photolithography masks and fabricating a new circuit from scratch.
To deposit a conductive path using a FIB system, the system operator directs a jet of precursor gas, typically an organometallic compound such as tungsten hexacarbonyl, to the surface of the specimen while a focused ion beam scans the area upon which the conductor is to be deposited. A metallic layer is deposited only in the area impacted by the beam, so the shape of the deposited metal can be precisely controlled. An ion beam assisted deposition process is described, for example, in U.S. Pat. No. 4,876,112 to Kaito et al. for a “Process for Forming Metallic Patterned Film” and U.S. Pat. No. 5,104,684 to Tao et al. for “Ion Beam Induced Deposition of Metals.”
During circuit editing, it is sometimes necessary to fill a “via,” that is, a hole between different levels of the circuit board. When the hole has a high aspect ratio, that is, the hole is deep and narrow, the FIB deposition process has difficulty filling the bottom of the hole and can leave voids in the deposited material. Voids increase resistance and are conducive to corrosion. It is also sometimes necessary to cut metal lines that are buried under layers of insulation. To cut the buried line, it is necessary to mill a small diameter via to expose the line without damaging neighboring devices, and then to cut the line through the via.
Use of an ion beam process to deposit an insulating material is also known. An electrically insulating material may be deposited, for example, before depositing a conductive path to prevent the new conductive path from electrically contacting an existing conductor. U.S. Pat. No. 5,827,786 to Puretz for “Charged Particle Deposition of Electrically Insulating Films” describes a procedure for depositing an electrically insulating material.
Current FIB tungsten and platinum depositions typically have resistivities greater than about 150 micro ohm centimeters (μΩ-cm). Recently-introduced FIB copper depositions have resistivities of 30-50 μΩ-cm. This is significantly higher that the resistivity of a pure metal, such as copper, which is less than 5 μΩ-cm. As conductor sizes continue to shrink and processor speeds increase, it will be necessary to reduce the resistivity of conductors deposited during the circuit edit process, so that the smaller conductors can still carry the required current. Similarly, the resistivity of material used to fill vias will need to decrease because the diameter of vias will decrease in the future so there is less conductive material in the hole to carry current. Low resistivity of the fill material and elimination of voids thus becomes even more important. Also, as via dimensions decrease it also becomes more difficult to cleanly sever a line at the bottom of the via without redepositing conductive material on the sidewalls of the via, which can short circuit other layers.
Another challenge in circuit editing is knowing when to stop a milling process. In the case of milling intended to sever a conductor, milling must stop before the layer under the conductor is damaged. The determination of the proper stopping or end point is referred to as “endpointing.” Most endpointing techniques determine when a new layer has been exposed by detecting a change in an image formed by the secondary particle current emitted as the beam impacts the work piece. When the material impacted by the beam changes because the beam has broken through one level, there is a sudden change in quantity and type of the secondary particles, and the appearance area in the image changes, for example, from light to dark or vice versa. As modern integrated circuits use smaller and smaller conductors and multiple layers of those conductors are separated by insulating layers, it is necessary that the holes milled by a focused ion beam to access buried conductors have a very small diameter to avoid damaging other conductors in intermediate layers.
As the aspect ratio increases, the secondary particles ejected by the ion beam are increasingly blocked by the walls of the hole and do not reach the detector. As the width of the access hole shrinks and the depth becomes greater, the secondary particle signal becomes exceedingly small and can be lost in the noise of the system, obscuring the end point information. The accuracy requirements for endpointing are getting stricter because the reduction in line thickness means there is less time to stop before the line is milled through. At the same time, the signal strength on which endpointing is typically based is decreasing due to both feature size reduction and the need for higher aspect ratio access holes. Thus, improved endpointing techniques are required for editing modern integrated circuits.
Processes for applying metal globally to a circuit are known. For example, copper electroplating has been used by IC manufactures to make on-chip interconnection in the Damascene process, originally developed by IBM in 1997. The electroplating bath solutions are specially formulated by and commercially available from various semiconductor chemical supplier companies for differently structured ICs. The IC manufacturing electroplating technology, known as superfilling has the capability of filling vias of ˜100 nm (1:5 aspect-ratio) during chip manufacturing. Such processes, however, are applied globally to an entire chip.